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J-STD-001E-2010: 4.5.1, Gold Removal Issues

Question: Since we are seeing more and more components with gold finish on the solder attachment pads(specifically, leadless ICs mostly with bottom side terminations only for RF circuitry), how would you propose we meet the J-STD requirement for gold removal? Does this mean we should remove the ICs from their tape and reel packaging, tin the leads for proper gold removal, then re-reel the parts for proper packaging for pick and place equipment? Have you experienced RF component manufacturers that only offer SMT components with gold finish before? Does the concern of gold embrittlement take into account how much solder paste is being deposited in a surface mount solder joint?

Answer: This is a new application for components where there is a bottom pad for either thermal relief or electrical functionality. The ability to tin these pads with the proper solder alloy could impact the coplanarity of the device when it is assembled to the printed board. The way 001 is written, there is no exemption for surface mount components, 4.5.1b states Gold shall [N1P2D3] be removed:

b. From 95% of all surface to be soldered of surface mount component regardless of gold thickness.

Therefore if you are building class 3 product, you have a dilemma as initiating this requirement may cause manufacturing problems with component coplanarity. I would strongly suggest this be identified as a topic of discussion at the next IPC meeting. If the commenter would submit the comments and concerns to the IPC, we could bring this up for discussion.

For clarification, gold removal is conducted to prevent gold embrittlement in the solder joint and this embrittlement has caused many problems in the past. High levels of gold in the solder joint will act as stress risers to initiate cracks in the solder joint, which is what we are trying to prevent.